Key specs of early samples of Intel's upcoming Lunar Lake CPUs have leaked, revealing details about their core and thread counts, cache configuration, and frequencies. HXL). The specs suggest that Lunar Lake will be very similar to its predecessor Meteor Lake in many ways, but there may be some important changes regarding caching and hyperthreading.
The specs are taken from a screenshot of Windows Task Manager running on a PC purportedly running Lunar Lake, courtesy of Zhihu user Xziar. The Lunar Lake chip is an A1 sample, meaning it's the first working model to come out of the factory. Historically, A1 silicon has tended to fall into prototype territory, especially for Intel. Meteor Lake was step C0 (C means his third major revision), Raptor Lake was B0, and Alder Lake was C0. So this Lunar Lake chip is probably not the final product.
Some of these specifications are more or less expected. Lunar Lake is physically smaller and seems to be focused on mobile efficiency, so it's no surprise that it only has eight cores total. The amount of L1 cache also means that Lunar Lake doesn't have low-power E-cores like Meteor Lake, or it's all low-power but with increased L1 cache size. The sample is likely ES silicon, so a 2.8 GHz boost clock isn't surprising either.
Header Cell – Column 0 | Moon Lake* |
---|---|
P core architecture | lion cove |
E-core architecture | Skymont |
Number of P cores | Four |
ENumber of cores | Four |
Number of threads | 8 |
L1 cache | 836KB (112KB per P core, 96KB per E core) |
L2 cache | 14MB (2.5MB per P core, 4MB per 4 E cores) |
L3 cache | 12MB |
boost clock | ~2.8GHz |
process | Intel 18A/TSMC N3B |
*Specifications have not been confirmed.
However, things get weird when you start looking at the cache. Lunar Lake appears to be identical to Meteor Lake in L1 and L2 caches. At least that's what the screenshots suggest. However, the Lunar Lake sample only has 12MB of L3 cache, which is less than the 14MB of L2 cache. It's very counterintuitive that Lunar Lake's L3 cache needs to be less than the L2 cache, since higher cache levels usually mean more capacity, often significantly more. This directly contradicts a previous leak that showed Lunar Lake's 16MB L3 cache, but the specs are otherwise identical.
It's possible that Task Manager can't read the Lunar Lake chip correctly and the sample includes 16MB of L3, but that might not be true. In response to a comment comparing Lunar Lake to Intel's low-end N300, XZiar said, “This cache is clearly not up to par.” If Task Manager was wrong, this would be a strange response. The leaker seems to think that his L3 cache of 12MB is the correct number.
Another strange specification is the number of threads. This is only 8. Intel's previous hybrid architecture CPUs included P-core hyperthreading, which should result in 12 threads. A1 silicon is unlikely to make it into the final product, so it could simply be disabled due to technical issues or testing purposes. On the other hand, early Arrow Lake samples also lack hyper-threading. This could be a coincidence, but it makes it more likely that Intel will move away from Hyper-Threading in his 2024.